1. Field of the Invention
This invention relates to circuits for, and methods of, sampling a time-varying input signal. More particularly, it relates to sample and hold circuits for use with a total power supply voltage which is as low as just a few tenths of a volt greater than the threshold voltage of MOS transistors used in the sample and hold circuits.
2. Background of Related Art
The portability of electronic devices is an important feature in today's society, e.g., as evidenced by the popularity of handheld portable cellular telephones. However, as is well known, a significant portion of the size and weight of a portable electronic device is required just for the power supply of the portable electronic device. To reduce its size and/or to increase its operational time between charges, it is desired that power consumption of portable electronic devices be minimized. One way of accomplishing this goal is to reduce the voltage level of the power supply. In some instances it is required that the voltage level of the power supply be reduced not only to minimize power consumption but also to comply with the low level electrical limits of fine-line integrated circuit technology, which is now approaching line widths of less than 0.1 .mu.m. The circuitry and line widths in such highly integrated devices are scaled down accordingly, based on the desired power supply level. Thus, while previous portable electronic devices typically utilized 5 volt power supplies, power supply levels have more recently decreased to about 3 volts, and most recently approached a total power supply of 1.0 volt for many portable electronic devices.
At very low power supply voltages, analog functions become difficult to implement using MOS transistors exhibiting standard threshold levels. To turn on an n-channel transistor switch, a voltage greater than the signal being passed through its channel plus its threshold voltage V.sub.T,n must be present at its gate. For a p-channel transistor switch, a voltage less than the power supply voltage minus its threshold voltage V.sub.T,p must be present at its gate.
Conventional CMOS processes feature n-channel devices exhibiting a 0.7 volt threshold, and p-channel devices exhibiting a 1.0 volt threshold. For a p-channel transistor to operate as a switch, its gate voltage must be at a level at least one threshold voltage V.sub.T,p below the signal passed through its channel. With a 1 volt total power supply, the entire supply voltage is necessary just to turn the p-channel transistor device ON. The p-channel MOS transistor device 402 would be virtually useless if employed as a switch with such a low power supply voltage because, as shown in FIG. 6A, it would never turn ON.
On the other hand, although a 1 volt power supply would have sufficient range to turn an n-channel MOS transistor device 404 ON, FIG. 6B shows that only about 30% (i.e., 0 to 0.3 volts) of the available signal range (0 to 1 volt) would pass therethrough.
Threshold voltages of standard MOS transistor devices can be lowered using more costly manufacturing processes, but still exhibit disadvantages when utilized in sample and hold circuits. For example, using conventional 0.35 .mu.m, 3 volt technology, an n-channel transistor device has a lower threshold voltage of about 0.5 volts. When operating as a switch, the n-channel transistor switch can pass signals from about 0 volts to 0.5 volts with a 1 volt power supply. On the other hand, a p-channel transistor device using this technology has a lower threshold voltage of about 0.8 volts. Thus, the lower threshold voltage p-channel transistor switch can pass signals from about 0.8 volts to 1.0 volt using the same 1 volt power supply.
Even if these lower threshold voltage devices are used in parallel using a 1 volt power supply, voltage inputs in the range of about 0.5 volts to 0.8 volts still cannot be passed by either the lower threshold voltage p-channel or the n-channel transistor devices, and thus would not be sampled properly.
The 1 volt power supply discussed herein may be a battery cell which is 1.2 volts when new, but discharges to about 1.0 volt over its useful life.
MOS transistor switches are commonly employed in sample and hold circuits. A sample and hold (S/H) circuit repeatedly captures and maintains a single sample of either the current or voltage of a time-varying signal long enough for an analog-to-digital converter (ADC) or other subsequent circuit to utilize that stabilized sample. Without a sample and hold circuit, the accuracy of the ADC or other circuitry following the sample and hold circuit would deteriorate due to their vulnerability to fluctuations in the input signal during the length of time that the sample is being utilized by subsequent circuitry.
FIG. 7 shows a conventional current sample and hold circuit, including an operational amplifier (op amp) OA1, a standard threshold MOS transistor device M1 operated as a switch, and a hold capacitor C.sub.H. The sample and hold circuit feeds a load switch ML and a load resistance R.sub.L during an active portion of a HOLD signal. The switch M1 is operated under the control of a sampling signal SAMP input to the gate of switch M1. When the sampling signal SAMP is active, i.e., at a logic 1, switch M1 allows the output of the op amp OA1 to pass and charge the hold capacitor C.sub.H. The load switch is operated under the control of the HOLD signal.
The op amp OA1 itself is a conventional device capable of a full output range from 0 volts up to the full level of the power supply, even with a 1 volt power supply. However, because of the ON threshold voltage of switch M1, the range of the charge voltage V.sub.CH passed by switch M1 and charged on the hold capacitor C.sub.H is limited to between about 0 and 0.3 volts. Thus, switch M1 allows only about 30% of the available signal range of 0 to 1.0 volts provided by the 1 volt voltage supply to pass and charge the hold capacitor C.sub.H. Even if switch M1 were to be a device having a lower ON threshold voltage improving the range of the charge voltage V.sub.CH across the hold capacitor C.sub.H, increased leakage current through switch M1 in the OFF condition would disadvantageously degrade the accuracy of the current sampling circuit. This is because it is difficult if at all possible for a low threshold voltage transistor device to be turned OFF completely.
If the n-channel switch M1 in the circuit of FIG. 7 is a standard threshold voltage device, i.e., having an ON threshold voltage of about 0.7 volts, then the range of charge voltage V.sub.CH will be only about 0 to 0.3 volts. In this case, the charge voltage V.sub.CH will reach the upper limit of its range at 0.3 volts.
If, on the other hand, switch M1 in the circuit of FIG. 7 is a low threshold voltage transistor device exhibiting an ON threshold voltage of, e.g., about 0.3 volts, the voltage range of the hold capacitor C.sub.H will be considerably improved to be 0 to 0.7 volts and be capable of charging to any level within the range of the output voltage V.sub.O of the op amp OA1, i.e., 0 to 0.7 volts. However, the increased ON leakage of the low threshold voltage switch M1 is nevertheless a disadvantage. Unfortunately, even when using a low threshold switch M1, the uppermost portion of the full range of the output voltage V.sub.O of the op amp OA1, i.e., 0.7 to 1 volt, cannot be sampled.
Thus, when used as switches, low threshold MOS transistor devices can improve considerably the range, of the output drive of a sample and hold circuit. However, low threshold MOS transistor devices are generally more costly to process than are normal threshold MOS transistor devices, and exhibit undesirable leakage current in the OFF condition as compared to normal threshold MOS transistor devices. In fact, the low threshold MOS transistor switch is a poor sample and hold element because it is difficult and sometimes impossible to turn a low threshold MOS device completely OFF. Furthermore, despite the lower threshold, low threshold MOS transistor devices nevertheless constrict the available signal range to less than that provided by a very low voltage power supply.
One conventional technique `bootstraps` the gate drive voltage of the MOS transistor switch to a value greater than the supply voltage. This works for integrated circuit technologies that can function without breakdown at these higher voltages, i.e., with signal voltages above the power supply voltage, but cannot be utilized with very fine-line integrated circuit technologies such as 0.1 .mu.m technology because of the smaller scale and limited electrical capability of the wiring and components. Therefore, bootstrapping of the gate drive voltage is not a preferred technique, particularly as it is not applicable to 0.1 .mu.m and smaller fine line technology.
Another conventional system is the well known "switched op amp", in which an entire amplifier is actively switched, i.e., turned ON to charge the hold capacitor C.sub.H, and switched OFF during the hold phase of the sample and hold operation. FIG. 8 shows a conventional closed-loop, switched op amp, voltage sample and hold circuit. In FIG. 8, a closed-loop, non-inverting amplifier OA2 features an output stage that can be tri-stated under control of a tri-state signal TR1. When not tri-stated, op amp OA2 charges hold capacitor C.sub.H. When tri-stated by an active or logic 1 state of tri-state signal TR1, the charge voltage V.sub.CH developed across the hold capacitor C.sub.H before the op amp OA2 was tri-stated provides a stable output sample of the input voltage V.sub.IN.
The conventional closed-loop, switched op amp, voltage sample and hold circuit shown in FIG. 8 provides rail-to-rail sampling outputs even when sufficient logic drive is not available for MOS transistor switches. Unfortunately, the output stage of the op amp OA2 must be shut down carefully. For instance, any mismatch in timing between the n-channel shutoff and the p-channel shut off of the amplifier output stage will inject an error charge onto the hold capacitor C.sub.H, disturbing its charge voltage V.sub.CH and thus the output of the sample and hold circuit. It is possible for this disturbance to be quite large.
Thus, there is a need for sampling circuits which are capable of accurate and full-ranging operation with a very low power supply voltage.